1. Field of the Invention
The present invention is related to a memory circuit and related method for integrating pre-decoding and selective pre-charging, especially to a memory circuit and related method for independently pre-charging or not pre-charging various column lines (or bit lines) selectively according to results of performing column pre-decoding during data accessing to decrease the pre-charging power consumption.
2. Description of the Prior Art
In the present society, various documents and data can be stored in forms of electrical signals to be transmitted, managed, and stored. Various types of memory (or memory circuits) capable of performing data accessing have become necessary for various electronic devices or information devices. Moreover, read-only memory circuits can be utilized in several fields since the read-only memory circuits can store data in a non-volatile manner. For example, read-only memory circuits are set in digital signal processing circuits (or chips) or in signal encoding/modulation chips disposed inside the cell phones to store codes or other necessary parameters and vectors. Along with the broad usage of the read-only memory circuits, further development of read-only memory circuits has become a research topic for those in the field.
As known by those skilled in the art, a plurality of memory cells are disposed inside a memory circuit to respectively store one bit of data. The memory cells can be arranged in matrix by “row line and column line” (may also be replaced as “word line and bit line”). A given bit line is selectively and electrically connected to a sense amplifier of the memory circuit, so that the electrical signal of the connected bit line can be transmitted to the sense amplifier through the bit line. Electronic signals of other bit lines which are not electrically connected to the sense amplifier can't be transmitted to the sense amplifier. Then one memory cell of a given word line is enabled, so that the memory cell at the intersection of the given word line and the given bit line can transmit the stored data to the sense amplifier, and the data of the memory cell can thus be accessed.
More concretely, in a read-only memory circuit, memory cells with different stored data respectively have different electronic conductivity (such as currents) to the connected bit lines. While performing the aforementioned data accessing, after enabling the objective memory cell by the given word line, the connected bit line of the objective memory cell is conducted, so that the electronic level (such as voltage level) of the bit line is changed or not changed according to the stored data of the memory cell. Moreover, the voltage level is transmitted to the sense amplifier by the electronic connection between the given bit line and the sense amplifier, so that the sense amplifier determines the stored data of the objective memory cell according to the voltage level. Equally, the stored data of the memory cell is transmitted to the connected bit line after the memory cell is enabled.
For the above accessing method, the bit line should be pre-charged to a default voltage level before enabling the objective memory cell. After enabling the objective memory cell, if the objective memory cell has a high conductivity, the voltage level of the corresponding bit line can be pulled down from the default voltage level to a lower voltage level. Then the sense amplifier determines that digital bit “0” is stored in the memory cell. Otherwise, if the voltage level of the corresponding bit line is maintained in the range of the default voltage level, the sense amplifier determines that the conductivity of the memory cell is significantly low, and the digital bit “1” is stored in the memory.
In other words, pre-charging the bit line (or the column line) is necessarily for data accessing in the memory circuit, especially for read-only memory circuits. However, in the conventional read-only memory circuit, all the bit lines (or column lines) in the matrix of the memory cells are pre-charged while accessing. Even if only one memory cell on single bit line is accessed, all the bit lines have to be pre-charged to the default voltage level. As a result, more power is consumed to pre-charge when accessing data in the conventional read-only memory circuit. Therefore, it is not beneficial for low power operation.